ddr3 settings changes on latest cm3 firmware after a suspend / resume cycle

I made a custom design based on am335x evm and beaglebone.

I was experiencing unstabilities issues (namely kernel memory crashes / panic / oops) after the first suspend / resume cycle using any kind of sw release (debian, arago, angstrom, etc.)

Those unstabilities could actually be related to HW settings changes done by the CM3 firmware in the resume operation.
The CM3 firmware is reprogramming ddr pad control settings and this could be the rootcause of those unstabilities (i could be wrong – however recompiling the CM3 firmware with ddr settings matching the ones applied by the bootloader (in uboot/board/ti/am335x/board.c) so far made those unstabilities disappear …) .

I have already opened a discussion with TI on this :

I was curious to see if anyone had ever experienced similar issues or had ever played with those cm3 hw settings ?

Best Regards,