I'm planning on driving a Hitachi TX26D12VM0AAA screen using a TI
sn75lvds83b lvds-framer. But I've got a few questions left:
- Is dvi_data0 aka blue0 the most or least significant bit?
- The screen supports 18 and 24 bit mode lvds, so I'd like to design
my hardware to support 24 bit mode. But I'm planning on programming
the SGX and read I needed to set dss to 16bit mode to get this
working. Are these modes all pin compatible? In other words, do the 16
en 18 bit modes only use the most significant bits leaving the least
significant bits blank? So I can still have the hardware designed for
24 bit mode (I don't care for those last 3 steps of white). If not,
any other recommendations on how to connect the pins.
- The screen doesn't use hsync or vsync, but has a display enable (DE)
signal somewhere in the lvds signal. Is this the same as the data
enable signal from the lcd header and does this signal hold the
necessary sync data. Or would the screen be able to sync to the
bitdata on its own and is the DE signal simply to turn the screen on
and off. Probably resulting in a flickring screen when connected to
the data enable signal.
I'm planning on driving a Hitachi TX26D12VM0AAA screen using a TI
sn75lvds83b lvds-framer. But I've got a few questions left:
- Is dvi_data0 aka blue0 the most or least significant bit?
dunno, read the trm/data sheet
- The screen supports 18 and 24 bit mode lvds, so I'd like to design
the beagle does not support LVDS out of the box...
my hardware to support 24 bit mode. But I'm planning on programming
the SGX and read I needed to set dss to 16bit mode to get this
working. Are these modes all pin compatible? In other words, do the 16
en 18 bit modes only use the most significant bits leaving the least
significant bits blank? So I can still have the hardware designed for
24 bit mode (I don't care for those last 3 steps of white). If not,
any other recommendations on how to connect the pins.
the SGX/frame buffer color depth is unrelated to the actualy display
color depth. The DSS will convert as needed.
- The screen doesn't use hsync or vsync, but has a display enable (DE)
signal somewhere in the lvds signal. Is this the same as the data
again, the BB LCD pins are not an LVDS interface, I guess you will need
to add some "glue" logic.
I'm planning on driving a Hitachi TX26D12VM0AAA screen using a TI
sn75lvds83b lvds-framer. But I've got a few questions left:
- Is dvi_data0 aka blue0 the most or least significant bit?
from where did you read that dvi_data0 is blue0? from the datasheet,
it should be R0, which is the LSB for Red.
- The screen supports 18 and 24 bit mode lvds, so I'd like to design
my hardware to support 24 bit mode. But I'm planning on programming
the SGX and read I needed to set dss to 16bit mode to get this
working. Are these modes all pin compatible? In other words, do the 16
en 18 bit modes only use the most significant bits leaving the least
significant bits blank? So I can still have the hardware designed for
24 bit mode (I don't care for those last 3 steps of white). If not,
any other recommendations on how to connect the pins.
- The screen doesn't use hsync or vsync, but has a display enable (DE)
signal somewhere in the lvds signal. Is this the same as the data
enable signal from the lcd header and does this signal hold the
necessary sync data. Or would the screen be able to sync to the
bitdata on its own and is the DE signal simply to turn the screen on
and off. Probably resulting in a flickring screen when connected to
the data enable signal.
DE should be needed for your screen. Usually for some of the
TXBlahBlahAAA screens, they generate the HSYNC & VSYNC internally in
the panel so you might not need HSYNC & VSYNC.
Read the screen datasheet for the info. check the timing diagrams for
the DE signal.
Thanks for the response but some things aren't quite confirmed yet.
from where did you read that dvi_data0 is blue0? from the datasheet,
it should be R0, which is the LSB for Red.
Table 14 of the BB documentation disagrees and says it's blue. But
doesn't answer the question on MSB and LSB. Is there anyone sure about
this?
the beagle does not support LVDS out of the box...
I know, i'm using TI's sn75lvds83b to glue things together
the SGX/frame buffer color depth is unrelated to the actualy display
color depth. The DSS will convert as needed.
So with omapfb.video_mode=1024x768MR-16@50 omap will still output 24
bit per pixel signals?
DE should be needed for your screen. Usually for some of the
TXBlahBlahAAA screens, they generate the HSYNC & VSYNC internally in
the panel so you might not need HSYNC & VSYNC.
Read the screen datasheet for the info. check the timing diagrams for
the DE signal.