The code is only compiling when clock is being commented out.
It is stating a syntax error. But i cant find any.
This is the error
debian@BeagleBone:/opt/source/dtb-6.1-Beagle$ sudo make
DTC src/arm64/overlays/k3-am67a-beagley-ai-csi1-imx415.dtb
Error: src/arm64/overlays/k3-am67a-beagley-ai-csi1-imx415.dts:18.24-40 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [Makefile:181: src/arm64/overlays/k3-am67a-beagley-ai-csi1-imx415.dtb] Error 1
make: *** [Makefile:105: all_arm64] Error 2
debian@BeagleBone:/opt/source/dtb-6.1-Beagle$
// SPDX-License-Identifier: GPL-2.0
/*
* DT Overlay for Sony IMX415 Camera on BeagleY-AI *** CSI1 Port ***
* Target: CSI1 Connector, I2C Bus 3 (main_i2c3), Address 0x37.
* **** CLOCK DEFINITION REMOVED. CLOCK USAGE COMMENTED OUT TO ALLOW COMPILATION ****
* Uses CSI1 nodes (ti_csi2rx1, dphy1, csi2rx1_in_sensor) and driver requirements.
*
* Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
* Modifications Copyright (C) 2024 <Your Name/Handle>
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
// <<<< Clock Definition Block REMOVED Entirely >>>>
// Ensure the MCU GPIO controller potentially used for reset is enabled
// Verify which controller the CSI1 reset pin actually uses
&mcu_gpio0 {
status = "okay";
};
// Target I2C Bus 3 for BeagleY-AI
&main_i2c3 {
status = "okay";
// Pinctrl might be needed if I2C3 pins are not muxed by default
// pinctrl-names = "default";
// pinctrl-0 = <&main_i2c3_pins_default>;
clock-frequency = <400000>; // Standard 400kHz
#address-cells = <1>;
#size-cells = <0>;
// Define the IMX415 sensor directly on I2C3
imx415: sensor@37 {
compatible = "sony,imx415"; // Driver match string
reg = <0x37>; // Confirmed I2C address on Bus 3
// Clock Usage - Driver requires "inck". Kept commented out for compilation.
// clocks = <&some_existing_clock_label>; // <<< Needs a valid phandle when uncommented
// clock-names = "inck"; // <<< Correct name for driver
// Reset GPIO for BeagleY-AI CSI1 - **** THIS PIN/CONTROLLER NEEDS VERIFICATION ****
reset-gpios = <&mcu_gpio0 15 GPIO_ACTIVE_LOW>; // <<< GUESSING Pin 15 for CSI1, corrected polarity
// Port definition linking sensor output to CSI1 receiver input
port {
csi2_cam1: endpoint { // Label for sensor output endpoint (using '1' for CSI1)
remote-endpoint = <&csi2rx1_in_sensor>; // Link to CSI1 receiver input endpoint
// Link frequency - adjust if camera module/mode requires different
link-frequencies = /bits/ 64 <456000000>;
clock-lanes = <0>; // Standard CSI clock lane
data-lanes = <1 2>; // Assuming 2 data lanes - VERIFY camera module!
};
};
};
};
// Configure the CSI1 Receiver Endpoint
// Assuming the structure involves modifying a port within cdns_csi2rx0.
// The exact nodes (&csi0_port1, &cdns_csi2rx0) might need verification against BeagleY base DT.
&cdns_csi2rx0 { // Assuming the Cadence CSI receiver IP block handles multiple ports
ports {
// Reference Port 1 for CSI1 connection
// The label '&csi0_port1' might need verification for BeagleY's specific structure for port 1
&csi0_port1 {
status = "okay";
csi2rx1_in_sensor: endpoint { // Receiver input endpoint for CSI1
remote-endpoint = <&csi2_cam1>; // Link back to sensor output endpoint
bus-type = <4>; // CSI2 DPHY
clock-lanes = <0>;
data-lanes = <1 2>; // Must match data-lanes in sensor node
};
}; // End of csi0_port1 definition/modification
}; // End of ports node
}; // End of cdns_csi2rx0 node modification
// Ensure the TI CSI1 Wrapper/Driver is enabled (based on imx219 CSI1 example)
&ti_csi2rx1 {
status = "okay";
};
// Ensure the DPHY for CSI1 is enabled (based on imx219 CSI1 example)
&dphy1 {
status = "okay";
};
// Optional: Disable CSI0 components if definitely not used
// &ti_csi2rx0 {
// status = "disabled";
// };
// &dphy0 {
// status = "disabled";
// };
Can anyone tell the right syntax, both xclk and inck. But it is still showing same error.