Hi all, I’ve got a real headache of a problem. First things first!
uname -a
Linux bbb 3.8.13-00729-g8a94e04 #1 SMP Sat Jan 11 16:48:03 PST 2014 armv7l GNU/Linux
After a few days of work, I’m having no luck getting the ECAP module to generate interrupts on my BeagleBone Black running Linux. I’ve disabled ECAP PWM support in the device tree, and written a brute-force style kernel module to force register values, but I never see the interrupt come down the line. My module performs the following steps (see below for the resulting register values):
-
Requests an IRQ using request_irq() with line number 31 (from section 6.3)
-
Enables the module in CM_PER_EPWMSS0_CLKCTRL (8.1.12.1.36)
-
Enables the clock in pwmss_ctrl (9.3.1.32)
-
Muxes the ECAP0_IN_APWM_OUT pin by setting the RXACTIVE bit and mode 0 in register conf_ecap0_in_pwm0_out (9.3.1.51)
-
Clears ECEINT
-
Sets ECCTL1, and ECCTL2 appropriately
-
Sets the CLR bits in ECCLR
-
Starts the timer by setting the TSCTRSTOP bit in ECCTL2
-
Sets all CEVTx bits in ECEINT
-
Sets the “smart” idle mode in register SYSCONFIG (15.1.3.2)
-
Enables the ECAP clock in CLKCONFIG (15.1.3.3)
-
Checking the eCAP_CLK_EN_ACK value in CLKSTATUS for ack bits
After doing all this, I can use a little utility that reads values of out /dev/mem and see the following example register values:
./force_int
PWMSS register values = {
IDVER: 0x47400001
SYSCONFIG: 0x00000008
CLKCONFIG: 0x00000111
CLKSTATUS: 0x00000111
}
ECAP0 register values ={
TSCTR: 0x9225bd45 CTRPHS: 0x00000000
CAP1: 0x004a139e CAP2: 0x068d53fe CAP3: 0x0049f5fc CAP4: 0x0047fae1
ECCTL1: 0x01aa ECCTL2: 0x0096 ECEINT: 0x001e
ECFLG: 0x003f ECCLR: 0x0000 ECFRC: 0x0000
REVID: 0x44d22100
}
All those values look sane; TSCTR counts up, I can strobe the pin and watch CAP values change and the ECFLG bits change correctly, but I never, ever get an interrupt in the kernel. My /proc/interrupts looks like this:
!cat
cat /proc/interrupts
CPU0
23: 0 INTC tps65217
28: 1372 INTC edma
30: 0 INTC edma_error
31: 0 INTC ecap0
34: 0 INTC musb-hdrc.0.auto
35: 1 INTC musb-hdrc.1.auto
44: 4416 INTC mmc1
46: 93 INTC 4819c000.i2c
52: 0 INTC tilcdc
56: 0 INTC 4a100000.ethernet
57: 2384 INTC 4a100000.ethernet
58: 1201 INTC 4a100000.ethernet
59: 0 INTC 4a100000.ethernet
80: 0 INTC mmc0
83: 20402 INTC gp_timer
86: 853 INTC 44e0b000.i2c
88: 296 INTC
91: 0 INTC rtc0
92: 0 INTC rtc0
125: 0 INTC 53100000.sham
150: 0 GPIO mmc0
IPI0: 0 CPU wakeup interrupts
IPI1: 0 Timer broadcast interrupts
IPI2: 0 Rescheduling interrupts
IPI3: 0 Function call interrupts
IPI4: 0 Single function call interrupts
IPI5: 0 CPU stop interrupts
Err: 0
As you see, I have a zero count for my ecap0 interrupt, and a zero count for Err interrupts, but my ECFLG value indicates I should have gotten four interrupts by now!
I suspect, like waking up the timer modules and peripheral clocks, that I’m just missing a crucial register value somewhere to enable the interrupt in the controller, but I have scoured the TRM and have come up dry.
Does anyone have a clue? I posted on TI’s board but since I rolled my own kernel based on the instructions here, I guess it’s not officially supported? 
Any pointers are appreciated, too. I don’t know a thing about debugging the Linux kernel.
-bmatt