Enable Cape via SYS_RESETn?


just to verify some things before I order design of my capes: according to http://elinux.org/Beagleboard:BeagleBoneBlack#Expansion_Header_Usage it is not allowed to have an input signal on any of the GPIO-pins during power-up or during boot. Resulting from that I think about using SYS_RESETn as signal to enable my capes. So my question:

  • which current can be pulled out ot SYS_RESETn / how much GPIO-inputs can I drive with this signal?

  • when SYS_RESETn is HIGH the GPIOs may not be programmed as input (because firmware is not fully started at this point) but the Cape-hardware possibly sets an input signal to them (because SYS_RESETn already enabled it). Is this a problem? Can I use SYS_RESETn to enable input signals too or should I use an additional GPIO as output which enables such signals much later than SYS_RESETn would do that?

Thanks for clarification!

The reset line is roughly 10mA. When it is LOW, do not connect any signal to the pins. No voltage of any kind can be driven into the pins until reset goes high.



And just to verify my second question: When SYS_RESETn is high but the
GPIOs are not multiplexed since the firmware is not fully started: is
it allowed to have a HIGH-signal on a GPIO pint that is not already
programmed as input?

Yes it is allowed. The pins default to inputs after reset.


Great, thanks for your help!