GPIO bank pin numbering discrepancy in device trees??

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1

I am confused by an apparent discrepancy in the numbering conventions of GPIO pins in device tree source files. For instance in the file cape-bone-weather-00A0.dts:

The “exclusive_use” section refers to gpio1_3:

/* state the resources this cape uses /
exclusive-use =
/ the pin header uses /
“P8.6”, / gpio1_3 /
/ the hardware IP uses */
“gpio1_3”;

But the section “fragment@2” refers to gpio2 3:

fragment@2 {
target = <&ocp>;
overlay {
onewire@0 {
compatible = “w1-gpio”;
pinctrl-names = “default”;
pinctrl-0 = <&weather_cape_w1_pins>;
status = “okay”;

gpios = <&gpio2 3 0>;
};
};
};

This is by no means the only occurrence of this apparent discrepancy. Is this documented? If so, please guide me.

Best regards,

Dave.