not sure what function this serves…
thanks!
Tom
It gives access to two pins from the processor into one pin of the expansion header. It was there on the Beaglebone as well.
It is a way to get more functionality out to the expansion header without adding more pins, which cannot be done.
It is documented in the SRM:
# Both of these signals connect to pin 41 of P11. Resistors are installed that allow for the
GPIO3_20 connection to be removed by removing R221. The intent is to allow the SW to
use either of these signals, one or the other, on pin 41. SW should set the unused pin in
input mode when using the other pin. This allowed us to get an extra signal out to the
expansion header.
Gerald