How does a pin name tie to physical pin on BBAI-64


Example P8_10 tie to AC24 (gpio0_16), but where or what file define this relationship?

I search all text “P8_10” in dts folder, excepf for

/* P8_10 (AC24) PRG1_PRU0_GPO15 (gpio0_16) AC24_MCAN6_TX */
	BONE_PIN(P8_10, default,   P8_10(PIN_INPUT, 7))
	BONE_PIN(P8_10, pruout,    P8_10(PIN_OUTPUT, 0))	/* prg1_pru0_gpo15 */
	BONE_PIN(P8_10, pruin,     P8_10(PIN_INPUT, 1))		/* prg1_pru0_gpi15 */
	BONE_PIN(P8_10, gpio,      P8_10(PIN_INPUT, 7))
	BONE_PIN(P8_10, gpio_pu,   P8_10(PIN_INPUT_PULLUP, 7))
	BONE_PIN(P8_10, gpio_pd,   P8_10(PIN_INPUT_PULLDOWN, 7))


&main_gpio0 {
	status = "okay";
	gpio-line-names = "", "P9_11", "P9_13", "P8_17", "P8_18", /* 0-4 */
		"P8_22", "P8_24", "P8_34", "P8_36", "P8_38A", /* 5-9 */
		"P9_23", "P8_37B", "P9_26B", "P9_24B", "P8_08", /* 10-14 */
		"P8_07", "P8_10",.......

nowhere that make I can image that P8_10 hook to gpio0_16 or AC24?

Edit: Look to me the order of “gpio-line-names” is the one, index 16 is “P8_10” which is chip0 line 16, is it correct or just coincidently?

Sorry i still need to fully ‘vet’ all the gpio-line-names… (pretty sure it’s 99% correct, but still need to automate the generation of that line…)

  • P8_10 is the label on the header you physically see on the board
  • gpio0_16 is what it shows up under linux with gpio tools (so the wakeup gpio bus is at 0, so gpio0_16 → is gpio1_16 in the kernel…)
  • AC24 is the ball name on the soc

For, we are trying to make it so you just talk over “P8_10” syntax so your software works on every board…

debian@BeagleBone:~/$ gpioinfo | grep -e chip -e P8.10
gpiochip0 - 84 lines:
gpiochip1 - 128 lines:
        line  16:      "P8_10"       unused   input  active-high 
gpiochip2 - 36 lines:

Edit and…

debian@BeagleBone:~/$ gpiofind P8_10
gpiochip1 16


Hi Roberts,

The thing is we are going to make a temporary board base on AI64 and there won’t have P8_10, or incase we want change name from “P8_10” to “P0_16”, that why is we want to look at the definition of P8_10 as an example.

If your doing a custom adapter that will become your own new board… Our macros are just going to confuse you…

might was well use the standard pinmuxing…

	main_uart0_pins_default: main-uart0-pins-default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x1e8, PIN_INPUT, 0) /* (AB2) UART0_RXD */
			J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */

So looking at:

BONE_PIN(P8_10, default,   P8_10(PIN_INPUT, 7))
#define P8_10(mode, mux) J721E_IOPAD(0x40, mode, mux)	/* AC24: PRG1_PRU0_GPO15 AC24_MCAN6_TX */

and include/dt-bindings/board/k3-j721e-bone-pins.h · v5.10.x-ti-arm64 · / BeagleBoard-DeviceTrees · GitLab

J721E_IOPAD(0x40, PIN_INPUT, 7)



This is exactly what we are looking for,

Thank you so much!