Hi everyone,
I’m trying to interface a RTC with my BBB using the I2C bus. The reference manual states that none of the pins in the expansion connectors should be driven while the system is not powered on. I have isolated other inputs using tristate buffers and the SYS_RESETn, but the I2C lines, being bidirectional is a bit trickier. Is it necessary in this case to isolate the lines during power up? I’m connecting the pull-ups to the +3v3 pin on the expansion connector.
If I should isolate the lines, what’s the best method? I’m thinking of using a cmos switch to disconnect the resistors during power up, but maybe there are better ideas.
Thnaks!
A single FET per line will isolate the BeagleBone if power is off, and
as a bonus will make the I2C inputs 5V tolerant. The basic circuit and
theory of operation is described in section 18 of Version 2.1 of the I2C
Specification (it's not in the newer 3.x versions of the spec).
Basically, you tie the FET gate to the BBB I/O power rail, the source to
the BBB I/O pin, and the drain to the "high-voltage" I2C signal (ie:
pulled up to a non-zero value when the BBB is at 0V).
Charles,
Thanks for your response.
I read the section you mentioned from the I2C standard and it seems that, for this to work properly, there has to be pull-up resistors on both sides of the FET, which doesn’t solve my problem. Maybe I didn’t understand something, but if I don’t pull-up the I2C pins of the BBB, the lines will never go high, because the FET will be in its off state.
I want to avoid pulling the I/O pins high before the BBB is fully powered on.
You can use the internal pull-up resistors on the BBB if you don't want
to put a pull-up resistor on the 'Bone side of the FET.
In normal operation, the far-side (high-voltage) pull-up resistor will
pull the BBB side high through the FET until the BBB side reaches the
Vgs threashold voltage (around a volt for a typical logic-level FET).
So the standard I2C pull-up resistor will pull the signal to around
2.3V, then the internal BBB pull-up only needs to pull the signal up the
rest of the way. Since the node is now isolated by the FET from
whatever is on the far side, there is minimal capacitance and the weak
internal pull-up will work fine. Plus the signal is already above the
input high level threshold voltage, so it really only needs to go all
the way to 3.3V to provide additional noise immunity.
Charles,
Thanks for your response.
I read the section you mentioned from the I2C standard and it seems that, for this to work properly, there has to be pull-up resistors on both sides of the FET, which doesn’t solve my problem. Maybe I didn’t understand something, but if I don’t pull-up the I2C pins of the BBB, the lines will never go high, because the FET will be in its off state.
I want to avoid pulling the I/O pins high before the BBB is fully powered on.
http://www.ti.com/product/TXS0102?keyMatch=txs&tisearch=Search-EN
Regards,
John