Hi,
We need some advice in measuring Beaglebone CPU(Cortex-A8) clock cycles.
Is there any way to measure the CPU cycles and use it inside the program?
I have heard about “ccnt” register but don’t know how exactly could we use that in the program.
Please let me know if there is a reference or pointers on how to implement the code.
Regards.
paddu
Just As I know ,Arm Cortex a8 dont have the tsc register as x86
Almost hrtimer in arm and other soc will use a PIT as source .
If you want to measure the code cost time. use gpio and graphic oscilloscope
Thank you.
Regarding using gpio and graphic oscilloscope
we could measure the clock cycles outside, but we need to use the
clock cycles inside the program in order to do some calculation in the program.
Do you want to measure cycles in Linux program or baremetal program? If you
are on Linux, this link:
http://halobates.de/modern-pmus-yokohama.pdf
may help you. If not, read the PMU section in the ARM ARM.
From this link , you can see
readtsc() means this only support on x86 ,tsc register is 64bit register and clock with main clock , on x86/64 this is can very precise
On ARM, use generic PIT,(maybe you should write your own driver ) ,
only limit is almost PIT register is 32bit
Thank all for the kind reply.
@liyaoshi-> I could find the link you have mentioned.
@Grissiom → Currently we are not using Linux, we are using Starterware.
I shall see if we could implement this using a ASM code.
From this link , you can see
readtsc() means this only support on x86 ,tsc register is 64bit register
and clock with main clock , on x86/64 this is can very preciseOn ARM, use generic PIT,(maybe you should write your own driver ) ,
only limit is almost PIT register is 32bit
I think on Linux, you can only use gperf and _hope_ it will fully utilize
the hardware resources.
The timers on AM335X is connected to asynchronous bus which is much slower
than the CPU cycle. If you want to measure cycles, PMU is almost the only
and _right_ thing to do. Chapter C12 in ARM ARM describe how to use PMU.
Thank all for the kind reply.
@liyaoshi-> I could find the link you have mentioned.
@Grissiom -> Currently we are not using Linux, we are using Starterware.
I shall see if we could implement this using a ASM code.
Cool. IIRC, startware has API to provide access to PMU. If you choose to do
it youself, you are certainly have to deal with assembly code -- PMU
registers are located in coprocessors.
Hi Paddu,
The Cortex-A8 has a Performance Monitor Control Register (coprocessor c9), you can check the documentation for the registers here (page 154, section 3.2.42):
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0344k/DDI0344K_cortex_a8_r3p2_trm.pdf
For a simple example of the code check this page: http://stackoverflow.com/questions/3247373/how-to-measure-program-execution-time-in-arm-cortex-a8-processor
In there they use assembly to configure and read the registers for the Cortex-A8, so it can be ported to any OS I believe.
The Peformance Monitoring Unit is very cool, there’s a ton of events you can measure there, you can record up to 5 events (including the Clock Cycles CCNT).
If you were using Linux it already has the implementation done for you, you only need some libraries (found in http://perfmon2.sourceforge.net/hw.html ).
Hope this helps.
Best Regards,
Luis
Hi,
Thank you for sharing very useful information.
With your suggestions currently I am able to read the Cycle count using using this register.
Please let me ask more question about CCNT register.
Just for the confirmation, I would like to know is this a 32 bit register? or 64 bit?
and what would happen if the count value is overflown, will the register reset to “0” ?
Regards
Paddu.
Hi Paddu,
I believe it is a 32-bit register (I found no mention of 64-bit registers in the c9 coprocessor). When it is overflown it resets to 0, in my code I take this into account. It looks like you can generate overflow interrupts (page 168 section 3.5.52) but I haven’t used them.
Hope this helps.
Regards,
Luis
Sorry, in my last reply it is page 168 section 3.2.52, not 3.5.52
Hi Luis,
Thank you so much.
Your information is very useful.
Regards
Paddu
It is a 32bit register(use "mrc" to read it instead of "mrrc"). If you are
afraid of overflow and don't want to deal with the interrupt, you could set
the D bit in PMCR register(c9, c12, 0). Than PMU will divide the cycle with
64.
Thank you Grissiom…
Ohh I almost forgot that you can check the Overflow Flag Status Register (page 159 section 3.2.45).