mpfs_bitstream - creating from Libero outputs

Hi Guys,

So I have a gateway project in Libero, I can generate the DirectC files and the FlashPro files.

How do I go from these to mpfs_bitstream.spi and mpfs_bitstream.spi.digest files?

I’m guessing these are the only files used by, the other seem to be ignored for me anyway.



The mpfs_bitstream.spi and mpfs_bitstream.digest files are created as part of the build-bittream python scripts. Libero has no knowledge of how to create these files.


I was just wondering how to take the libero outputs and create the files, is there a script I can use?

Edit: not the full build python script, but rather taking the bitstream to create the files.

Actually, I was mistaken in my initial answer. The mpfs_bitstream.spi file is generated by Libero and the mpfs_dtbo.spi file containing the DTS overlay is generated outside Libero by the python scripts.
For mpfs_bitstream.spi, what you are looking for is the SPI tick box in the “Export Bitstream” Design Flow step.
If you are going down that route make sure you lobotomize the board before programming to prevent a mismatch of device tree overlay and the board reprogramming itself with the original bitstream. You basically need to make the System Controller’s SPI flash look like it does not contain a valid bitstream or device tree by erasing the start of it.

Thanks for the info.

So just copying over the spi files and then using is not enough, I have to clear the SPI flash first before running it?

p.s. This is starting from having already used the build python script to generate the original device tree/spi etc and using with the generated files.

Then editing the Libero project to create a new bitstream.

What you describe “should” work as long the device tree overlay did not change with your Libero design edits. The one key thing to avoid is programming directly from Libero through JTAG. If you program through JTAG make sure you clear the SPI flash content first.

Hi @Vauban

Nice one, thanks for all the info.

I’ll let you know how it goes…


Hi @Vauban,

This is not going well :slight_smile:

Triggering FPGA Gateware Update (/sys/kernel/debug/fpga/microchip_exec_update), always takes some time so that’s doing something.

But on restart reboot: Restarting system it usually is not reprogramming the FPGA.

If I program a different gateway and then my changed one it catches and works.

I have tried sudo flash_erase /dev/mtd0 0 1 to try to force it but that has no effect, so maybe I am misunderstanding you there?

So there is some rule on restart that is not being fired to program the fpga :frowning:

I think it is something to do with the Design Version, as long as that is different it works. Just need to work out how that is set…

OK, you need to change the design version in libero : Program Design->Configure Programming Options.

As far as I can see the version just has to be different not greater.

You only need the two spi files.

Then everything works.

Yes, you figured it out. This is another thing the python build scripts do for you but that you need to manage yourself if using Libero directly. The design version needs to be different for the reprogramming to take place.

Thanks, just got to work out a way to automate it in libero…