Powerdown Isolation

Looking at the BBB schematics, I see that you have a buffer for the serial port 0 powered by VDD_3v3B.
Since it seems that that rail is powered up last and powered down first it provides the protection for the CPU.

So my question is on a cape board if i power all devices on the cape with VDD_3v3B is that sufficient to protect the
CPU from a power up/down Error so i will not ruin the CPU ? OR do i also need to use a buffer just to be sure?

thanks

It is there to prevent a serial cable from powering the board when unpowered thru th tx wire

Gerald

Yes i see that but my question still stands

It is there to prevent a serial cable from powering the board when unpowered thru th tx wire

Gerald

You better power it off of the 3,3VB rail for all interface connections. That means any signal that interfaces to the process or needs to be powered by that rail irrespective of the serial cable question which is not an issue as long as you do it this way.

Gerald