Hi,
I’m trying to enable the SPI bus on the BBAI with a custom DTB.
With kernel 4.19 was working fine, but migrating to the 5.10-ti-rt kernel I’m facing a problem with the CS0 from the SPI.
The CS1 is enabled and working but the CS0 Is not enabled and I found this message on the dmesg:
[ 5.977783] omap2_mcspi 480b8000.spi: chipselect 0 already in use
[ 5.983978] spi_master spi1: spi_device register error /ocp/interconnect@48000000/segment@0/target-module@b8000/spi@0/channel@0
[ 5.995544] spi_master spi1: Failed to create SPI device for /ocp/interconnect@48000000/segment@0/target-module@b8000/spi@0/channel@0
To enable the SPI I’m using this
/* SPI 3 /
DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLUP | MUX_MODE3) / A12: P9.28: spi3_cs0 - SPI3_CS0 /
DRA7XX_CORE_IOPAD(0x36D8, PIN_INPUT_PULLUP | MUX_MODE3) / A11: P9.29: spi3_d1 - SPI3_MISO /
DRA7XX_CORE_IOPAD(0x36A8, MUX_MODE15) / DISABLE */
DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLUP | MUX_MODE3) /* B13: P9.30: spi3_d0 - SPI3_MOSI */
DRA7XX_CORE_IOPAD(0x36D4, PIN_INPUT_PULLUP | MUX_MODE3) /* B12: P9.31: spi3_sclk - SPI3_SCK */
DRA7XX_CORE_IOPAD(0x36A4, MUX_MODE15) /* P9.31a DISABLE */
&mcspi3 {
#address-cells = <1>;
#size-cells = <0>;
status = “okay”;
ti,pindir-d0-out-d1-in = <1>;
channel@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "spidev";
symlink = "spi/1.0";
reg = <0>;
spi-max-frequency = <24000000>;
};
channel@1 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "spidev";
symlink = "spi/1.1";
reg = <1>;
spi-max-frequency = <24000000>;
};
};
I tried a lot and I coudn’t figure out what is using the CS0 Pin,
any clue ?
Thanks