PRU memory map

According to the PRU Reference guide (SPRUHF8A–May 2012–Revised June 2013), table 5 “Local Data Memory Map” on page 10, PRU0 sees its 8k of RAM @ 0x00000000 and sees PRU1’s 8k of RAM @ 0x00002000. PRU1 also sees its 8k of RAM @ 0x00000000 and sees PRU0’s 8k of RAM @ 0x00002000. Both see the 12k ‘shared’ block @ 0x00010000. There is an additional note that is confusing:

(1) When PRU0 accesses Data RAM0 at address 0x00000000, PRU1 also accesses Data RAM1 at address 0x00000000. Data

RAM0 is intended to be the primary data memory for PRU0 and Data RAM1 for PRU1. However, for passing information

between PRUs, each PRU can access the data ram of the other PRU at address 0x0001_0000.

Is this a typo? Shouldn’t it read “each PRU can access the data ram of the other PRU at address 0x00002000”? Otherwise why bother listing the fact that each PRU maps the other’s 8k of RAM @ 0x00002000? If it’s not a type then is it just redundant since the table already shows a shared 12k block @ 0x00010000?

Thx,

Chip Burns

Chris, this is a typo.

Regards,
Thomas