PRU with internal ADC question

Hi friends. Im trying to use the BBB built-in ADC to read values with regular sampling frequency. I am using almost all defined by Rafael Vega’s github project page (https://github.com/rvega/bbb-pru/blob/master/apps/adc/pru.c). I already made changes to read the ADC sampled values on the ARM program and everithing are working fine. BUT i have 2 questions about this program:

  1. I want to know how he knows the necessaries BBB registers to configurate the ADC and the communication pipe between ADC and PRUs on this setup? I already looked the PRUSS and SITARA doccumentation but with no match the registers names used by him.

  2. how i can calculate the sampling frequency? I found on his page that it was configured to 50 ksps but, trying to calculate this sampling frequency on the gived formula:

// fs = 24MHz / (CLK_DIV2Channels*(OpenDly+Average*(14+SampleDly))) (on line 108 from the link above)

I didn’t get an integer fs value, for example, using their specified values (clock_divider = 4; open_delay = 4; average = 1; sample_delay = 4; and channel = 6) i get 22727.2727273 Hz… Am i missing something?

Thanks for all…

From Vega’s line 62

fifo0_count = HWREG(0x44e0d0e4);

Go to the TRM(spruh73p search at ti.com), chapter 2, Table 2-2
Look for region name ADC_TSC, Start Address 0x44E0_D000 to End Address 0x44E0_EFFF
So you are looking for register at offset 0x000000E4
click on the ADC-TSC link or look for Table 12.5.1 TSC_ADC_SS Registers
look for offset e4, that is register STEPDELAY16, follow the link to 12.5.1.50
the table 12-54 gives the register field description.
The TRM is a good reference, the URL might change so downloading might be advisable, but
knowing how to find the latest “spruh73” manual is also a good exercise to master.
Chad