I am using P9_25 on the BBAI-64 using the EHRPWM4_B. The only way I can get it to run is to use a overlay with the following:
&bone_pwm_4 {
status = “okay”; /* EHRPWM4-B on P9-25 */
};
I have to use the Linux command line to enable the device – /dev/bone/pwm/bbai64_P9_25_ehrpwm4_b. The question would be what is missing in my code, or in my overlay:
void initPwm(void) // pru_ecap.h
{
/* Clear Time base control: Sets the following
* No SYNC, Active Period load from shadow register, No load from phase register, Counter mode count up
/
EPWM4.TBCTL = 0x0000; // Clear Time base Control
/ Set Time base clock to: TBCLK = SYSCLkOUT/(HSPCLKDIV * CLKDDIV) = 200Mhz/(4) = 50Mhz
* PWM Frequency = 20 Khz - 50,000/20 = 2500 for TPRD count value
*/
EPWM4.TBCTL_bit.CTRMODE = TB_COUNT_UP;
EPWM4.TBCTL_bit.PHSEN = TB_DISABLE;
EPWM4.TBCTL_bit.PRDLD = TB_SHADOW;
EPWM4.TBCTL_bit.SYNCOSEL = TB_SYNC_DISABLE;
EPWM4.TBCTL_bit.HSPCLKDIV = TB_DIV2; // Divide by 2
EPWM4.TBCTL_bit.CLKDIV = TB_DIV2; // Divide by 2
EPWM4.CMPCTL = 0x0000; // Clear register
// EPWM4.CMPCTL_bit.LOADAMODE = CC_CTR_ZERO;
// EPWM4.CMPCTL_bit.SHDWAMODE = CC_SHADOW;
EPWM4.CMPCTL_bit.LOADBMODE = CC_CTR_ZERO;
EPWM4.CMPCTL_bit.SHDWBMODE = CC_SHADOW;31
// EPWM4.AQCTLA = 0x0000; // Clear register
// EPWM4.AQCTLA_bit.ZRO = AQ_SET; // Force EPWM4A Output HI when TBCNT = 0
// EPWM4.AQCTLA_bit.CAU = AQ_CLEAR; // Force EPWM4A Output LO when TBCNT = CMPA
// EPWM4.AQCTLA_bit.PRD = AQ_NO_ACTION; // Do nothing when TBCNT = TPRD
EPWM4.AQCTLB = 0x0000; // Clear register
EPWM4.AQCTLB_bit.ZRO = AQ_SET; // Force EPWM4B Output HI when TBCNT = 0
EPWM4.AQCTLB_bit.CBU = AQ_CLEAR; // Force EPWM4B Output LO when TBCNT = CMPB
EPWM4.AQCTLB_bit.PRD = AQ_NO_ACTION; // Do nothing when TBCNT = TPRD
EPWM4.TBPRD = 3125; // 20 Khz sample rate
EPWM4.TBPHS = 0x0000; // Clear register
// EPWM4.CMPA = 1563; // 50% Duty cycle
EPWM4.CMPB = 1563; // 50% Duty cycle
}