Ok, so i have create a similar board and schematic to the beagleboard
that give me access to every pin of the 515pn omap3530 CBB package
while still having the components of the beagleboard. we got an
estimate back and for a educational classroom first run through the
price seems alittle jaw dropping. so i'm starting to look at the
omap3530 CUS package which is easier to route. The main problem is
that the CUS package does not have the 2Gb POP memory on it and i
would need to figure out how to turn the CBB pop memory situation into
a CUS TSOP memory package.
Before i go running into how to do that is there by chance a similar
beagleboard schematic that uses the CUS package instead of the CBB
package?
There is no such schematic for the Beagle. But, it isn’t that complicated to make one. You can look at the OMAP3530 datasheet and align the pins on the OMAP and signals that go to the POP part using the POP data sheets. Then transfer that from the CUS signal names and pins to the TSOP packages. There aren’t that many signal types to hook up, the control pins and the databus.
There are other boards out there that use the CUS package, but I have not looked to see what schematics are provided that you can copy. Check the different boards listed at the following URL and see what you can find.
There is no such schematic for the Beagle. But, it isn't that complicated to
make one. You can look at the OMAP3530 datasheet and align the pins on the
OMAP and signals that go to the POP part using the POP data sheets. Then
transfer that from the CUS signal names and pins to the TSOP packages. There
aren't that many signal types to hook up, the control pins and the databus.
There are other boards out there that use the CUS package, but I have not
looked to see what schematics are provided that you can copy. Check the
different boards listed at the following URL and see what you can find.
I just had a breakthrough. that POP memory chip is a BGA! XD we can
switch to a CUS package omap3530 and still use that same BGA memory
chip! the pins that it would hook up to would be moved around but that
memory chip can still be used.
I have done a design with the CUS package.
I used the POP memory for the CBC package that was 0.65mm pitch.
Micron has recently informed me that they are discontinuing that
package
due to lack of sales. Guess I'm the only one buying it or something.
So I guess that means they also won't be supporting the CBC package in
POP mode.
Rather sucks from my point of view. Not sure yet what my path will be.
For now I'm just going to buy enough parts to last a while I guess.
If you have other related design questions, you may contact me
directly.
Actually, Micron will continue to support it if they have a sufficient numbers shipped each year. The quantity is not that high and based on the customers that are using it, it should be able to be met. The rub is that the customers will need to agree to buy the parts. The other issue is that the new users of the part based on the OMAP3530CBB package are not yet online and in production. So Micron has no visibility there. The part was designed for the OMAP2430 which never really went broad in it’s adoption so to date the quantities are not there. So, while the decision has been made by Micron, it is not necessarily a done deal.
BTW he said it was all the 152 ball parts, not just the one that I'm
using.
So, I pray that you're right.
That TI has pull and/or there turns out to be enough volume to sustain
the package.
That would be very nice for me and others too, I suspect...
well my entire first design is capable of being done on 2 layers with
switching to the CUS package, ive got 5 weeks left in the spring
semester and if i want it before the end of classes it has to be done
like next week. i doubt my abilities to get everything redone in a
weekend but i am gonna try =|
Good luck! Watch out for the DDR signal trace impedance in the layout. It will be tough to maintain with a two layer board. You may have to slow down the clock on the DDR to get it to work.
on the CUS, they have less power pins for the main core. i go from 34
vdd_core to 24. should i then also scale down the capacitor usage with
that? going from 9 caps down to 6? and similarly vdds_mem and vdds?