RISC-V Based PRU on FPGA

I want to discuss the project that is offered in GSOC’22 which is “RISC-V based PRU on FPGA”. I think I have all the required skills and a deep understanding of RISC-V, Verilog, and assembly. I want to discuss a few things but I am unable to figure out how to get in touch with the mentors of this project. Any help would be appreciated!

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Google…GSoc has some requirements and due dates.

Seth

P.S. The beagleboard.org people, I am pretty sure, are hosting a GSoC, um, thing this year (2022).

Also, let me try to find out. BRB. https://summerofcode.withgoogle.com/ is there new site. On the BBB.io side of things, there are IRC room(s) and other avenues to get in touch. Sign up!

Also: Google Summer of Code 2022 Timeline  |  Google Developers is a timeline on how and when to do what and where.

And, in this forum: About Google Summer of Code .

One more for the books: BeagleBoard/GSoC/Ideas-2022 - eLinux.org .

There’s been a fair bit of discussion on this project idea on BeagleBoard.org - gsocchat. There’s also been a draft proposal put up on the elinux.org wiki.