I would appreciate some advice on the following problem-
I need to communicate with and industrial device using the “9th bit high” protocol, which means the address byte is sent with parity set to mark and all other bytes sent with parity set to space.
I have implemented this and the parity setting is working correctly.
However, when switching over from MARK parity to SPACE parity using the tcsetattr, the delay between first(address) byte and the next byte following is ± 20ms.
This is way out of the protocol spec of max inter-byte delay of 5ms.
What would be the best approach to to reducing this timing?
Will it be possible with the 8250omap driver which uses dma?
Any other tips, pointers will be appreciated.