I am designing a LCD expansion board connecting to the headers
mentioned above. The levelshifting ist done with four TI SN74LVC8T245.
After prerouting the board, I now have differences in signal trace
lengths of up to 1cm. By a rough estimate, I figured out that at 30
MHz each clock cycle is about 1cm long, so this is not going to work I
guess.
For making it match exactly, I would like to know if the signals at
the headers have the same timing. This means that are the trace length
from the processor to the headers equal?
General rule of thumb for board layout is that electrical signal
propagation speed is about 1 foot/ns, so your 30cm/ns figure sounds
right to me. I wouldn't start worrying about balancing line lengths
until you get up over 100MHz, and even there it's not hyper-critical.
If you had problems with your board, propagation skew on a 22MHz
signal wouldn't be at the top of my list of things to check.
First of all, I agree that skew will not be a problem. But I'd like to
make a comment on the numbers.
30 cm/ns is correct for vacuum/air but not for PCB materials such as
FR-4. In a homogeneous medium, the propagation speed is c_0/sqrt(e_r),
so for a stripline in
FR4 with a dielectric constant of 4-4.6 it'll be approximately 14-15
cm/ns. For microstrips, the medium is inhomogeneous so the "effective
e_r" will be lower, generally in the 2.2-2.6 range which gives a
propagation velocity of about 18-20 cm/ns.
Robert, If i interpret the SN74LVC8T245 datasheet correctly, won't the
rise/fall time cause problems at 30 MHz?
Without any science I’m sure 1cm will not affect any LCD picture! I have designed a lot of LCD adapters for different ARM devices and 1cm is very good difference in length
