Was anyone able to verify if SPIDEV works with kernel version 2.6.32?
Thank you,
regards,
ivan
Indeed it does. I'm using 2.6.32 currently. I wrote up a short (and still
incomplete) blurb on bringing up SPI on the Beagle on the elinux wiki, if it
helps.
Cheers,
- Ben
Did you both tested it in GPIO mode and McSPI mode?
Nope, I only ended up getting McSPI mode working. GPIO support was only added
for debugging.
- Ben
Dear Ben,
your wiki is fine but I think the spi_dev_info struct should be a pointer so
static struct spi_board_info beagle_mcspi_board_info[] __initdata= {
moreover it is still not clear to me why the clock need to be defined as an input if the peripheral is master mode.
If our uP is SPI master it should issue the clock, the data lines are just shift registers both for the out as for the in line.
I work in master mode with the clock line for spi4 defined as output, I see clock transitions and the data on the MOSI line…
To be honest I read somewhere in the mux.h that defining a line as input makes it (possibly) bidirectional, but still I think there is absolutely no need for the clock to be an input as long as you are bus master…mmm…
your wiki is fine but I think the spi_dev_info struct should be a pointer so
static struct spi_board_info beagle_mcspi_board_info[] __initdata= {
You are definitely right. I adapted the code from my kernel code.
moreover it is still not clear to me why the clock need to be defined as an
input if the peripheral is master mode.
When I first heard the suggestion of enabling input enable on the clock pin I
thought the exact same thing. However, it seems that the SOMI pin needs the
output of the input reciever to know when to latch its value, which makes a
fair amount of sense. I fought with getting the SPI controller to receive
anything but zeros for four full days, only to finally realize that enabling
input on CLK immediately fixed the issue.
If our uP is SPI master it should issue the clock, the data lines are just
shift registers both for the out as for the in line. I work in master mode
with the clock line for spi4 defined as output, I see clock transitions and
the data on the MOSI line....
To be honest I read somewhere in the mux.h that defining a line as input
makes it (possibly) bidirectional, but still I think there is absolutely no
need for the clock to be an input as long as you are bus master....mmm...
It seems that every ball has a three-state output driver as well as an input
receiver, which is disabled with the input bit in the PADCONF register. As I
said above, the output of the receiver is needed by SOMI.
Hope this helps,
- Ben