I had assumed that the two I2C controllers on SOC were hard IP peripheral blocks. However the name of the driver has me wondering if that is true:
“Microchip FPGA I2C controller”
Are the controllers hard IP in the silicon, or flashed into the FPGA? Can someone point me to a block diagram of the SOC peripherals? 
Thank you,
Justin
If you look here, you can see that I2C0/1 are the two hard IP peripheral blocks.
That is not to say that you can’t add more yourself, should you ever need any.
Thank you yes! I found the block diagram not long after, but I could not edit my post until it was approved.
https://www.microchip.com/en-us/products/fpgas-and-plds/system-on-chip-fpgas/polarfire-soc-fpgas
-J
