Using LP-XDS110 JTAG with Beaglebone Black

General Discussion
1

We have the latest TI JTAG, the LP-XDS110 which has a 10-pin JTAG connector. We wish to use this to debug code on the PRU of Beaglebone Black. We’ve already soldered the CTI-20 connector onto the Beagle.

Problem we’ve realized is, there doesn’t appear to be an adapter which can go between the 10-pin (emulator) and CTI-20 (target), per this TI link:
https://software-dl.ti.com/ccs/esd/xdsdebugprobes/emu_jtag_adapters.html

–> Has anyone here used the LP-XDS110 with your BBB, and if so how did you connect it? Looking at the pinouts, each signal on the 10-pin has a correspondence to the CTI-20. (See: https://software-dl.ti.com/ccs/esd/documents/xdsdebugprobes/emu_jtag_connectors.html). So I wonder if we could just build our own connector?

If however you think this is a blind alley, what JTAG Emulator do you use with Beagle?

Thanks!

2

Hey Philip,

Take a look at these -

The LP-XDS110 has all the JTAG signals on the main connector as well not just the tiny 10-pin, so you can just use regular dupont wires to connect them, it’s fairly low speed JTAG so you don’t need to worry about signal integrity.

1 Like
3

If you don’t want to build PCBs and are ok with a bit of wiring mess using some of these grabbers on the Beagle side and connecting to the big connector on the XDS110 also works -

https://www.amazon.com/Create-idea-Analyzer-Interface-Precision/dp/B0CGD4GZBT/ref=sr_1_1?crid=F34DQTV3RIDK&dib=eyJ2IjoiMSJ9.62bG0v6953CISYBDr_qgQdLLiMytyMjSF-tzjEpNNnC5mkRY8XTKaXZUUqX1ZTYMbRld2dyvobGOlP6LMFnkeGKNnBRf64LxD3bkgUWgq_5Ai8fX4MpCwQ0VDgcyfZX06D15nqM3b3sJgHMUQyRB5VByZ8s5m_Jewujnfek7Ipnp0B8-Egznn27zy55YZUp7irsBQ97wKJoWb45FxkE8biFmuqdsku-mPTlSwcq16A0.OKB0Klq2jpAcuzB-nyOrjPPPfkC_2eUPd7D3RvnaozE&dib_tag=se&keywords=dupont+logic+analyzer+clips&qid=1775679731&sprefix=dupon+logic+analyzer+clips%2Caps%2C294&sr=8-1

Grabbers
Grabbers1500×1500 109 KB

1 Like
4

Thank you, that is reassuring.
From the large 20-pin connector on the LP-XDS I can map TDI, TDO, TCK, TMS, and nRST over to the Beagle. The LP-XDS connector also has SWO with no apparent pin to land it on the Beagle … its CTI-20 standard has a shared TDO/SWO pin. Do I need to do anything with the LP-XDS’s SWO pin?

5

Oh! I thought the bbb had a standard jtag pins, but headed not populated? Are you saying the pin out is none standard? All my jtag leads have floating leads (FTDI cable is the main one. Just admit though for arm devices I tend to just use the two wire connection. For that the RPi debug probe is cheap and works. These days it’s fairly straight forward to program a low end arm device to act as a two wire, devices - there is software available on github, let my find the link …

6

This is the JTAG pinout on the Beagle and yes you have to solder a header.

image
image1201×514 72.3 KB

7

Hi!

To update, we’ve wired the connection using the 20-pin connector on the back of the LP-XDS110. I set the CCS frequency to 500kHZ. Then when we try to connect to the Beagle, CCS is saying: “The value is ‘-233’ (0xffffff17). The title is ‘SC_ERR_PATH_BROKEN’ …. The JTAG IR and DR scan-paths cannot circulate bits, they may be broken.“ Entire error log below.

We hooked up the scope to TDI, TDO and TCK. During a connection attempt, bits appear to come out TDI from the JTAG - but no response from target on TDO. The clock (TCK) cycles.

Our wiring is detailed in below diagram, per color code (TMS is white wire, GND is grey). We also connect TDI-TDI, TDO-TDO … but CCS still won’t connect after we swap them midstream. Finally I have the JTAG jumpered to sense voltage from the target but there’s an almost identical CCS failure if I have it provide the 3.3v to the target. We’ve also double checked continuity of all wires several times.

Any suggestion? Do we need to hook up more pins from the target? Should we do anything with the EMU[0] and [1] pins CCS highlights?

image
image936×309 97.5 KB

-----[Print the board config pathname(s)]------------------------------------

C:\Users\<_snip_>\]AppData\Local\TEXASI~1\
CCS\ccs2050\0\0\BrdDat\testBoard.dat

-----[Print the reset-command software log-file]-----------------------------

This utility has selected a 100/110/510 class product.
This utility will load the adapter ‘jioxds110.dll’.
The library build date was ‘Mar 4 2026’.
The library build time was ‘18:13:05’.
The library package version is ‘20.5.0.3902’.
The library component version is ‘35.35.0.0’.
The controller does not use a programmable FPGA.
The controller has a version number of ‘5’ (0x00000005).
The controller has an insertion length of ‘0’ (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.

-----[Print the reset-command hardware log-file]-----------------------------

The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the XDS110 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for XDS110 features.
The controller cannot monitor the value on the EMU[0] pin.
The controller cannot monitor the value on the EMU[1] pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly ‘0’ (0x0000).

-----[An error has occurred and this utility has aborted]--------------------

This error is generated by TI’s USCIF driver or utilities.

The value is ‘-233’ (0xffffff17).
The title is ‘SC_ERR_PATH_BROKEN’.

The explanation is:
The JTAG IR and DR scan-paths cannot circulate bits, they may be broken.
An attempt to scan the JTAG scan-path has failed.
The target’s JTAG scan-path appears to be broken
with a stuck-at-ones or stuck-at-zero fault.