using mmap -> gpio on Bone

Hello, I have a TCP server I wrote using the old Beagle Board that controlled a device in an area that could not be occupied when a particle accelerator was running. As the Beagle Board is no longer available, I’m now porting the server to the Bone.
I used mmap to create access to the GPIO registers. The new docs are different, and I’m trying to check that I understand them.
So, if I want to set bits in GPIO 1, would I add 0x4804c000 (gpio1 offset) and 0x194 (setdataout) to create the address of the set data register?

For mmap, you’d open a region at 4804c000, and then use an index of 194/4 for word access or 194/2 for halfword access.

Is this right?

(The original version set up the port mapping with pinconf, now I can use devicetree.)

Thanks very much,


You can get that info from the AM335x TRM I beleive but what I do to get this information is to do something such as this:

root@wgd:~/# ls /sys/devices/platform/ocp/*.gpio/gpio/
gpio2 gpio22 gpio23 gpio26 gpio3 gpiochip0

gpio44 gpio45 gpio46 gpio47 gpio48 gpio49 gpio50 gpio51 gpio60 gpiochip32

gpio86 gpio87 gpio88 gpiochip64

gpio110 gpio111 gpio112 gpio115 gpio117 gpiochip96

gpiochip0 being bank 0 gpiochip96 being bank 3. The added benefit to doing this the way I’m showing above. Is that if you’re configuring your pins via an overlay, This will tell you which pins are a part of which GPIO bank(at a glance )

Sorry, I misread your post. So, each bank is 0x2000 in size, with various registers living at different locations in that 8192 bytes of memory. Each register within that bank as I recall is 32bits( double check that to make sure ). But usually how I’ll access a given register is something like this:

#define GPIO0 (0x44E07000)
#define GPIO2 (0x481AC000)
#define GPIO_SIZE (0x2000)

#define GPIO_DATAOUT (0x13C)
#define GPIO_DATAIN (0x138)
. . .
gpio_addr = mmap(0, GPIO_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, GPIO0);
if(gpio_addr == MAP_FAILED){
bank0_out = gpio_addr + GPIO_DATAOUT;
. . .

Then it’s just a matter of which bit( pin ) I want to access in this particular register. 0-31. Which is explained in greater detail in the technical reference manual for the AM335x processor.

I posted some code on the groups here yesterday, or the day before for the full code listing of what I’m using an explanation above. Pretty much, a really simple, and to the point line select using 3 GPIO’s, and an IO pin multiplexer.

So, each bank is 0x2000, but they are apparently not contiguous. Well, you seem to confirm the 4804c000 address for bank 1, and then 138 and 13c for the in and out registers, which matches the btittlebach document I am working from.
Your mmap code is exactly like the code I used in the earlier version of my software.

So, thanks VERY much for confirming I am reading these documents correctly!