which BBB IO pins are ready to use by default?

A while back I went through the BBW schematic and determined which IO pins
appeared not to be in use at all in the default shipping setup (because
the named signal coming out of the chip didn't show up anywhere else except
a header). I then tested them all to make sure they worked for digital IO.
It looks like lots of these pins are now used for other purposes on the BBB:

  # No longer available: used for MMC1_DAT0 through MMC1_DAT7
  #GPIO1_0 => 'gpmc_ad0',
  #GPIO1_1 => 'gpmc_ad1',
  #GPIO1_2 => 'gpmc_ad2',
  #GPIO1_3 => 'gpmc_ad3',
  #GPIO1_4 => 'gpmc_ad4',
  #GPIO1_5 => 'gpmc_ad5',
  #GPIO1_6 => 'gpmc_ad6',
  #GPIO1_7 => 'gpmc_ad7',

  # Not available: hooked up to resistors and "T13" (whatever that may
  # be) in the schematic. Its still brought out to the header though.
  #GPIO1_16 => 'gpmc_a0',

  # No longer available: used for MMC1_CLK signal in schematic
  #GPIO1_30 => 'gpmc_csn1',
  # No longer available: used for MMC1_CMD signal in schematic
  #GPIO1_31 => 'gpmc_csn2'

Of the few remaining IO pins, GPIO1_12 through GPIO1_15, and GPIO0_26 and
GPIO0_27 have a bracketed mark on the header page of the schamatic stating:
'CAUTION: USED ON BOARD'. The signals don't show up elsewhere on the schematic
though. I'm guessing maybe that caution comment applies only to the MMC1_*
connected header pins, not the aforementioned GPIO ones (slight schematic bug)?

GPIO3_19 appears to be unconnected except to the header. GPIO2_1 likewise
(though it falls in one of the USED ON BOARD sections mentioned above).
Neither of these were on my original list of available pins for the BBW,
though I don't know why not at this point. I probably just missed them.

Is this summary of the situation accurate? If the pins in the marked sections
actually are available, then the unconnected pin set would be:

GPIO0_26
GPIO0_27
GPIO1_12
GPIO1_13
GPIO1_14
GPIO1_15
GPIO1_17
GPIO1_29
GPIO2_1
GPIO3_19

This is getting to be not too many. Is there another bunch of pins that
might be usable for general digital IO (perhaps with the loss of some
not-too-essential hardware)?

Britton

Derek Molloy has a great spreadsheet here:

https://github.com/derekmolloy/boneDeviceTree/blob/master/docs/BeagleboneBlackP8HeaderTable.pdf

https://github.com/derekmolloy/boneDeviceTree/blob/master/docs/BeagleboneBlackP9HeaderTable.pdf

Regards,

A while back I went through the BBW schematic and determined which IO pins
appeared not to be in use at all in the default shipping setup (because
the named signal coming out of the chip didn't show up anywhere else except
a header). I then tested them all to make sure they worked for digital IO.
It looks like lots of these pins are now used for other purposes on the BBB:

  # No longer available: used for MMC1_DAT0 through MMC1_DAT7
  #GPIO1_0 => 'gpmc_ad0',
  #GPIO1_1 => 'gpmc_ad1',
  #GPIO1_2 => 'gpmc_ad2',
  #GPIO1_3 => 'gpmc_ad3',
  #GPIO1_4 => 'gpmc_ad4',
  #GPIO1_5 => 'gpmc_ad5',
  #GPIO1_6 => 'gpmc_ad6',
  #GPIO1_7 => 'gpmc_ad7',

  # Not available: hooked up to resistors and "T13" (whatever that may
  # be) in the schematic. Its still brought out to the header though.
  #GPIO1_16 => 'gpmc_a0',

  # No longer available: used for MMC1_CLK signal in schematic
  #GPIO1_30 => 'gpmc_csn1',
  # No longer available: used for MMC1_CMD signal in schematic
  #GPIO1_31 => 'gpmc_csn2'

Of the few remaining IO pins, GPIO1_12 through GPIO1_15, and GPIO0_26 and
GPIO0_27 have a bracketed mark on the header page of the schamatic stating:
'CAUTION: USED ON BOARD'. The signals don't show up elsewhere on the schematic
though. I'm guessing maybe that caution comment applies only to the MMC1_*
connected header pins, not the aforementioned GPIO ones (slight schematic bug)?

GPIO3_19 appears to be unconnected except to the header. GPIO2_1 likewise
(though it falls in one of the USED ON BOARD sections mentioned above).
Neither of these were on my original list of available pins for the BBW,
though I don't know why not at this point. I probably just missed them.

Is this summary of the situation accurate? If the pins in the marked sections
actually are available, then the unconnected pin set would be:

GPIO0_26
GPIO0_27
GPIO1_12
GPIO1_13
GPIO1_14
GPIO1_15
GPIO1_17
GPIO1_29
GPIO2_1
GPIO3_19

This is getting to be not too many. Is there another bunch of pins that
might be usable for general digital IO (perhaps with the loss of some
not-too-essential hardware)?

Derek Molloy has a great spreadsheet here:

https://github.com/derekmolloy/boneDeviceTree/blob/master/docs/BeagleboneBlackP8HeaderTable.pdf

https://github.com/derekmolloy/boneDeviceTree/blob/master/docs/BeagleboneBlackP9HeaderTable.pdf

Nice tables. I notice that all the pins that appear to definitely be
free are safely free of 'Notes' entries in those tables :slight_smile:

I'm still not exactly sure what's safe to use though. Is it true that
if:

  * The signal name on the outside of the chip box on page 3 of the
     schematic is of the form GPIO?_??, and

  * That signal name doesn't appear anywhere else in the schematic
     (pdf search) except at the header

then its safe to use that pin? For the BBW, I ended up
not considering GPIO1_3 safe I believe because software
configured it as the 1-wire driver and so caused some of the
/sys/kernel/debug approach as enabled as described here on the BBB
http://www.embeddedhobbyist.com/debian-tips/beaglebone-black/mount-debugfs-on-debian/
to not work.

Might it also be safe to use use pins with other names (e.g. EHRPWM2A),
provided they still meet the second criteria? Or are pins with other names
configured differently in software?

Britton